The present invention relates to an LSI memory circuit.
Generally, a mask ROM is mostly used as a kanji pattern memory. The mask ROM is generally constructed as shown in FIG. 2. In response to a clock signal from a chip enable input buffer and clock circuit 1, an address buffer 3 receives address information. The upper and lower bits of the address information are supplied to a row decoder 5 and a column decoder 7, respectively. The row decoder 5 supplies its output to a memory cell matrix 7. The memory cell matrix 7 produces a corresponding row data to the column decoder 9. The column decoder 9 supplies column data corresponding to the address to an output buffer 11, thereby performing read operation of data.
A device using kanji patterns such as a CRT display unit and a printer is provided with two types of kanji patterns due to different scanning directions. FIGS. 1A and 1B show examples of such patterns. Kanji patterns corresponding to two types of scanning directions are stored in the mask ROM. In the examples, FIGS. 1A and 1B show the patterns corresponding to a row scan (horizontal read) and a column scan (vertical read), respectively. Therefore, a kanji data processing system should be provided with mask ROMs for two types of patterns or an external circuit for performing horizontal and vertical conversion.
However, the printer essentially uses two types of patterns since there are two types of printing forms, vertical and horizontal. On the other hand, having mask ROMS for the two types of patterns is costly, and the vertical-horizontal conversion remarkably reduces its performance.